To drive significantly greater productivity and efficiency for complex chip designs, Synopsys is introducing a new cloud-optimized electronic design automation (EDA) deployment model.
Synopsys Cloud provides access to the company’s cloud-optimized design and verification products, with pre-optimized infrastructure on Microsoft Azure to address higher levels of interdependencies in chip development.
Chip development in the cloud represents a way forward for an industry grappling with exploding computational demands along with continued time-to-market pressure.
In recent years, chip development teams began leveraging a “bring your own cloud” (BYOC) approach offered by Synopsys and other EDA vendors, where chip development teams are required to source compute infrastructure from public cloud service providers and are frequently constrained by pre- defined design and verification capacity.
Synopsys is working closely with its preferred cloud partner, Microsoft, to transform the landscape through a software-as-a-service (SaaS) chip development solution on the Microsoft Azure cloud computing platform. With the SaaS approach, customers can directly access and pay as they go for cloud compute resources and for any Synopsys cloud-enabled design and verification product.
Customers who already have cloud resources through a BYOC model can also take advantage of Synopsys Cloud and its pay-per-use cloud-enabled EDA tools.
The collaboration with Microsoft Azure will enable design teams to benefit from flexibility and faster time-to-market, addressing today’s systemic complexities in chip design and verification. Read more from Microsoft about this collaboration and its benefits.
Synopsys is working together with major foundries to streamline access to required manufacturing collateral for use with its cloud-optimized products. The roadmap for the collaboration aims to provide customers with a flexible, cloud-optimized approach for accessing and managing foundry collateral.
“Our new Synopsys Cloud offering promises to be transformative, providing designers the ability to scale up or down in response to their dynamic chip design and verification needs,” said Sassine Ghazi, president and chief operating officer at Synopsys. “As more design flows incorporate AI, requiring even more resources, the virtually unlimited compute and EDA access we’re providing while will lay the foundation for new levels of semiconductor innovation delivering a flexible, secure chip development environment for future demands.”
For more information about this news, visit www.synopsys.com.